; Switch all clocks to REFCLOCK
WRITE: 0XC0013010 0x00000000
; TBG-A: SE vco_div 0x2,
; DIFF vco_div 0x1, vco_range 0xd
; tbg_N 0x48 KVCO = 2400 MHz
WRITE: 0xC0013204 0x00C00091
WRITE: 0xC0013204 0x00C00121
WRITE: 0xC0013220 0x08030803
WRITE: 0xC0013208 0x94011402
WRITE: 0xC0013230 0x00020002
WRITE: 0xC0013208 0x94011402
WRITE: 0xC001320C 0x53E556E6
WRITE: 0xC0013210 0x014A014D
WRITE: 0xC001320C 0x53E556E6
WRITE: 0xC0013204 0x00C00120
WRITE: 0xC0013208 0x94011402
WAIT_FOR_BIT_SET: 0xC0013208 0x80008000 0x00100000
DELAY: 0x00000100

; Set clocks to DDR300 preset
WRITE: 0xC0013014 0x05032010
WRITE: 0xC0013004 0x2326202A
WRITE: 0xC0013008 0x1A09AAA9
WRITE: 0xC001300C 0x208B3482
WRITE: 0xC0013000 0x0333C0FE
WRITE: 0xC0013210 0x014B014D
; Switch all clocks to back dividers
WRITE: 0xC0013010 0x00009FFF
DELAY: 0x00000001
