Expand description
Platform-specific intrinsics for the wasm32 platform.
This module provides intrinsics specific to the WebAssembly
architecture. Here you’ll find intrinsics specific to WebAssembly that
aren’t otherwise surfaced somewhere in a cross-platform abstraction of
std, and you’ll also find functions for leveraging WebAssembly
proposals such as atomics and simd.
Intrinsics in the wasm32 module are modeled after the WebAssembly
instructions that they represent. Most functions are named after the
instruction they intend to correspond to, and the arguments/results
correspond to the type signature of the instruction itself. Stable
WebAssembly instructions are documented online.
If a proposal is not yet stable in WebAssembly itself then the functions within this function may be unstable and require the nightly channel of Rust to use. As the proposal itself stabilizes the intrinsics in this module should stabilize as well.
See the module documentation for general information
about the arch module and platform intrinsics.
§Atomics
The threads proposal for WebAssembly adds a number of
instructions for dealing with multithreaded programs. Most instructions
added in the atomics proposal are exposed in Rust through the
std::sync::atomic module. Some instructions, however, don’t have
direct equivalents in Rust so they’re exposed here instead.
Note that the instructions added in the atomics proposal can work in
either a context with a shared wasm memory and without. These intrinsics
are always available in the standard library, but you likely won’t be
able to use them too productively unless you recompile the standard
library (and all your code) with -Ctarget-feature=+atomics.
It’s also worth pointing out that multi-threaded WebAssembly and its
story in Rust is still in a somewhat “early days” phase as of the time
of this writing. Pieces should mostly work but it generally requires a
good deal of manual setup. At this time it’s not as simple as “just call
std::thread::spawn”, but it will hopefully get there one day!
§SIMD
The simd proposal for WebAssembly added a new v128 type for a
128-bit SIMD register. It also added a large array of instructions to
operate on the v128 type to perform data processing. Using SIMD on
wasm is intended to be similar to as you would on x86_64, for example.
You’d write a function such as:
#[cfg(target_arch = "wasm32")]
#[target_feature(enable = "simd128")]
unsafe fn uses_simd() {
    use std::arch::wasm32::*;
    // ...
}Unlike x86_64, however, WebAssembly does not currently have dynamic
detection at runtime as to whether SIMD is supported (this is one of the
motivators for the conditional sections and feature
detection proposals, but that is still pretty early days). This means
that your binary will either have SIMD and can only run on engines
which support SIMD, or it will not have SIMD at all. For compatibility
the standard library itself does not use any SIMD internally.
Determining how best to ship your WebAssembly binary with SIMD is
largely left up to you as it can be pretty nuanced depending on
your situation.
To enable SIMD support at compile time you need to do one of two things:
- 
First you can annotate functions with #[target_feature(enable = "simd128")]. This causes just that one function to have SIMD support available to it, and intrinsics will get inlined as usual in this situation.
- 
Second you can compile your program with -Ctarget-feature=+simd128. This compilation flag blanket enables SIMD support for your entire compilation. Note that this does not include the standard library unless you recompile the standard library.
If you enable SIMD via either of these routes then you’ll have a WebAssembly binary that uses SIMD instructions, and you’ll need to ship that accordingly. Also note that if you call SIMD intrinsics but don’t enable SIMD via either of these mechanisms, you’ll still have SIMD generated in your program. This means to generate a binary without SIMD you’ll need to avoid both options above plus calling into any intrinsics in this module.
Structs§
- v128target_family="wasm"WASM-specific 128-bit wide SIMD vector type.
Functions§
- f32x4target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- f32x4_abs target_family="wasm"andsimd128Calculates the absolute value of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
- f32x4_add target_family="wasm"andsimd128Lane-wise addition of two 128-bit vectors interpreted as four 32-bit floating point numbers.
- f32x4_ceil target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value not smaller than the input.
- f32x4_convert_ i32x4 target_family="wasm"andsimd128Converts a 128-bit vector interpreted as four 32-bit signed integers into a 128-bit vector of four 32-bit floating point numbers.
- f32x4_convert_ u32x4 target_family="wasm"andsimd128Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a 128-bit vector of four 32-bit floating point numbers.
- f32x4_demote_ f64x2_ zero target_family="wasm"andsimd128Conversion of the two double-precision floating point lanes to two lower single-precision lanes of the result. The two higher lanes of the result are initialized to zero. If the conversion result is not representable as a single-precision floating point number, it is rounded to the nearest-even representable number.
- f32x4_div target_family="wasm"andsimd128Lane-wise division of two 128-bit vectors interpreted as four 32-bit floating point numbers.
- f32x4_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
- f32x4_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
- f32x4_floor target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value not greater than the input.
- f32x4_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
- f32x4_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
- f32x4_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
- f32x4_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
- f32x4_max target_family="wasm"andsimd128Calculates the lane-wise minimum of two 128-bit vectors interpreted as four 32-bit floating point numbers.
- f32x4_min target_family="wasm"andsimd128Calculates the lane-wise minimum of two 128-bit vectors interpreted as four 32-bit floating point numbers.
- f32x4_mul target_family="wasm"andsimd128Lane-wise multiplication of two 128-bit vectors interpreted as four 32-bit floating point numbers.
- f32x4_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
- f32x4_nearest target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
- f32x4_neg target_family="wasm"andsimd128Negates each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
- f32x4_pmax target_family="wasm"andsimd128Lane-wise maximum value, defined asa < b ? b : a
- f32x4_pmin target_family="wasm"andsimd128Lane-wise minimum value, defined asb < a ? b : a
- f32x4_relaxed_ madd target_family="wasm"andrelaxed-simdComputesa * b + cwith either one rounding or two roundings.
- f32x4_relaxed_ max target_family="wasm"andrelaxed-simdA relaxed version off32x4_maxwhich is eitherf32x4_maxorf32x4_pmax.
- f32x4_relaxed_ min target_family="wasm"andrelaxed-simdA relaxed version off32x4_minwhich is eitherf32x4_minorf32x4_pmin.
- f32x4_relaxed_ nmadd target_family="wasm"andrelaxed-simdComputes-a * b + cwith either one rounding or two roundings.
- f32x4_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
- f32x4_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- f32x4_sqrt target_family="wasm"andsimd128Calculates the square root of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
- f32x4_sub target_family="wasm"andsimd128Lane-wise subtraction of two 128-bit vectors interpreted as four 32-bit floating point numbers.
- f32x4_trunc target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
- f64x2target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- f64x2_abs target_family="wasm"andsimd128Calculates the absolute value of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
- f64x2_add target_family="wasm"andsimd128Lane-wise add of two 128-bit vectors interpreted as two 64-bit floating point numbers.
- f64x2_ceil target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value not smaller than the input.
- f64x2_convert_ low_ i32x4 target_family="wasm"andsimd128Lane-wise conversion from integer to floating point.
- f64x2_convert_ low_ u32x4 target_family="wasm"andsimd128Lane-wise conversion from integer to floating point.
- f64x2_div target_family="wasm"andsimd128Lane-wise divide of two 128-bit vectors interpreted as two 64-bit floating point numbers.
- f64x2_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
- f64x2_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
- f64x2_floor target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value not greater than the input.
- f64x2_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
- f64x2_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
- f64x2_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
- f64x2_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
- f64x2_max target_family="wasm"andsimd128Calculates the lane-wise maximum of two 128-bit vectors interpreted as two 64-bit floating point numbers.
- f64x2_min target_family="wasm"andsimd128Calculates the lane-wise minimum of two 128-bit vectors interpreted as two 64-bit floating point numbers.
- f64x2_mul target_family="wasm"andsimd128Lane-wise multiply of two 128-bit vectors interpreted as two 64-bit floating point numbers.
- f64x2_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
- f64x2_nearest target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
- f64x2_neg target_family="wasm"andsimd128Negates each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
- f64x2_pmax target_family="wasm"andsimd128Lane-wise maximum value, defined asa < b ? b : a
- f64x2_pmin target_family="wasm"andsimd128Lane-wise minimum value, defined asb < a ? b : a
- f64x2_promote_ low_ f32x4 target_family="wasm"andsimd128Conversion of the two lower single-precision floating point lanes to the two double-precision lanes of the result.
- f64x2_relaxed_ madd target_family="wasm"andrelaxed-simdComputesa * b + cwith either one rounding or two roundings.
- f64x2_relaxed_ max target_family="wasm"andrelaxed-simdA relaxed version off64x2_maxwhich is eitherf64x2_maxorf64x2_pmax.
- f64x2_relaxed_ min target_family="wasm"andrelaxed-simdA relaxed version off64x2_minwhich is eitherf64x2_minorf64x2_pmin.
- f64x2_relaxed_ nmadd target_family="wasm"andrelaxed-simdComputes-a * b + cwith either one rounding or two roundings.
- f64x2_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
- f64x2_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- f64x2_sqrt target_family="wasm"andsimd128Calculates the square root of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
- f64x2_sub target_family="wasm"andsimd128Lane-wise subtract of two 128-bit vectors interpreted as two 64-bit floating point numbers.
- f64x2_trunc target_family="wasm"andsimd128Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
- i8x16target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- i8x16_abs target_family="wasm"andsimd128Lane-wise wrapping absolute value.
- i8x16_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
- i8x16_add_ sat target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow toi8::MAX.
- i8x16_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- i8x16_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- i8x16_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
- i8x16_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
- i8x16_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
- i8x16_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
- i8x16_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
- i8x16_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
- i8x16_max target_family="wasm"andsimd128Compares lane-wise signed integers, and returns the maximum of each pair.
- i8x16_min target_family="wasm"andsimd128Compares lane-wise signed integers, and returns the minimum of each pair.
- i8x16_narrow_ i16x8 target_family="wasm"andsimd128Converts two input vectors into a smaller lane vector by narrowing each lane.
- i8x16_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
- i8x16_neg target_family="wasm"andsimd128Negates a 128-bit vectors interpreted as sixteen 8-bit signed integers
- i8x16_popcnt target_family="wasm"andsimd128Count the number of bits set to one within each lane.
- i8x16_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- i8x16_relaxed_ swizzle target_family="wasm"andrelaxed-simdA relaxed version ofi8x16_swizzle(a, s)which selects lanes fromausing indices ins.
- i8x16_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
- i8x16_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- i8x16_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, sign extending.
- i8x16_shuffle target_family="wasm"andsimd128Returns a new vector with lanes selected from the lanes of the two input vectors$aand$bspecified in the 16 immediate operands.
- i8x16_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- i8x16_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
- i8x16_sub_ sat target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow toi8::MIN.
- i8x16_swizzle target_family="wasm"andsimd128Returns a new vector with lanes selected from the lanes of the first input vectoraspecified in the second input vectors.
- i16x8target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- i16x8_abs target_family="wasm"andsimd128Lane-wise wrapping absolute value.
- i16x8_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
- i16x8_add_ sat target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow toi16::MAX.
- i16x8_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- i16x8_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- i16x8_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
- i16x8_extadd_ pairwise_ i8x16 target_family="wasm"andsimd128Integer extended pairwise addition producing extended results (twice wider results than the inputs).
- i16x8_extadd_ pairwise_ u8x16 target_family="wasm"andsimd128Integer extended pairwise addition producing extended results (twice wider results than the inputs).
- i16x8_extend_ high_ i8x16 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, sign extended.
- i16x8_extend_ high_ u8x16 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
- i16x8_extend_ low_ i8x16 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, sign extended.
- i16x8_extend_ low_ u8x16 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
- i16x8_extmul_ high_ i8x16 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i16x8_extmul_ high_ u8x16 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i16x8_extmul_ low_ i8x16 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i16x8_extmul_ low_ u8x16 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i16x8_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
- i16x8_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
- i16x8_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
- i16x8_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
- i16x8_load_ ⚠extend_ i8x8 target_family="wasm"andsimd128Load eight 8-bit integers and sign extend each one to a 16-bit lane
- i16x8_load_ ⚠extend_ u8x8 target_family="wasm"andsimd128Load eight 8-bit integers and zero extend each one to a 16-bit lane
- i16x8_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
- i16x8_max target_family="wasm"andsimd128Compares lane-wise signed integers, and returns the maximum of each pair.
- i16x8_min target_family="wasm"andsimd128Compares lane-wise signed integers, and returns the minimum of each pair.
- i16x8_mul target_family="wasm"andsimd128Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
- i16x8_narrow_ i32x4 target_family="wasm"andsimd128Converts two input vectors into a smaller lane vector by narrowing each lane.
- i16x8_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
- i16x8_neg target_family="wasm"andsimd128Negates a 128-bit vectors interpreted as eight 16-bit signed integers
- i16x8_q15mulr_ sat target_family="wasm"andsimd128Lane-wise saturating rounding multiplication in Q15 format.
- i16x8_relaxed_ dot_ i8x16_ i7x16 target_family="wasm"andrelaxed-simdA relaxed dot-product instruction.
- i16x8_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- i16x8_relaxed_ q15mulr target_family="wasm"andrelaxed-simdA relaxed version ofi16x8_relaxed_q15mulrwhere if both lanes arei16::MINthen the result is eitheri16::MINori16::MAX.
- i16x8_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
- i16x8_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- i16x8_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, sign extending.
- i16x8_shuffle target_family="wasm"andsimd128Same asi8x16_shuffle, except operates as if the inputs were eight 16-bit integers, only taking 8 indices to shuffle.
- i16x8_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- i16x8_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
- i16x8_sub_ sat target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow toi16::MIN.
- i32x4target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- i32x4_abs target_family="wasm"andsimd128Lane-wise wrapping absolute value.
- i32x4_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed four 32-bit integers.
- i32x4_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- i32x4_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- i32x4_dot_ i16x8 target_family="wasm"andsimd128Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results.
- i32x4_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
- i32x4_extadd_ pairwise_ i16x8 target_family="wasm"andsimd128Integer extended pairwise addition producing extended results (twice wider results than the inputs).
- i32x4_extadd_ pairwise_ u16x8 target_family="wasm"andsimd128Integer extended pairwise addition producing extended results (twice wider results than the inputs).
- i32x4_extend_ high_ i16x8 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, sign extended.
- i32x4_extend_ high_ u16x8 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
- i32x4_extend_ low_ i16x8 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, sign extended.
- i32x4_extend_ low_ u16x8 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
- i32x4_extmul_ high_ i16x8 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i32x4_extmul_ high_ u16x8 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i32x4_extmul_ low_ i16x8 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i32x4_extmul_ low_ u16x8 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i32x4_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
- i32x4_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
- i32x4_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
- i32x4_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
- i32x4_load_ ⚠extend_ i16x4 target_family="wasm"andsimd128Load four 16-bit integers and sign extend each one to a 32-bit lane
- i32x4_load_ ⚠extend_ u16x4 target_family="wasm"andsimd128Load four 16-bit integers and zero extend each one to a 32-bit lane
- i32x4_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
- i32x4_max target_family="wasm"andsimd128Compares lane-wise signed integers, and returns the maximum of each pair.
- i32x4_min target_family="wasm"andsimd128Compares lane-wise signed integers, and returns the minimum of each pair.
- i32x4_mul target_family="wasm"andsimd128Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
- i32x4_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
- i32x4_neg target_family="wasm"andsimd128Negates a 128-bit vectors interpreted as four 32-bit signed integers
- i32x4_relaxed_ dot_ i8x16_ i7x16_ add target_family="wasm"andrelaxed-simdSimilar toi16x8_relaxed_dot_i8x16_i7x16except that the intermediatei16x8result is fed intoi32x4_extadd_pairwise_i16x8followed byi32x4_addto add the valuecto the result.
- i32x4_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- i32x4_relaxed_ trunc_ f32x4 target_family="wasm"andrelaxed-simdA relaxed version ofi32x4_trunc_sat_f32x4(a)converts thef32lanes ofato signed 32-bit integers.
- i32x4_relaxed_ trunc_ f64x2_ zero target_family="wasm"andrelaxed-simdA relaxed version ofi32x4_trunc_sat_f64x2_zero(a)converts thef64lanes ofato signed 32-bit integers and the upper two lanes are zero.
- i32x4_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
- i32x4_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- i32x4_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, sign extending.
- i32x4_shuffle target_family="wasm"andsimd128Same asi8x16_shuffle, except operates as if the inputs were four 32-bit integers, only taking 4 indices to shuffle.
- i32x4_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- i32x4_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
- i32x4_trunc_ sat_ f32x4 target_family="wasm"andsimd128Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit signed integers.
- i32x4_trunc_ sat_ f64x2_ zero target_family="wasm"andsimd128Saturating conversion of the two double-precision floating point lanes to two lower integer lanes using the IEEEconvertToIntegerTowardZerofunction.
- i64x2target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- i64x2_abs target_family="wasm"andsimd128Lane-wise wrapping absolute value.
- i64x2_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed two 64-bit integers.
- i64x2_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- i64x2_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- i64x2_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
- i64x2_extend_ high_ i32x4 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, sign extended.
- i64x2_extend_ high_ u32x4 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
- i64x2_extend_ low_ i32x4 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, sign extended.
- i64x2_extend_ low_ u32x4 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
- i64x2_extmul_ high_ i32x4 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i64x2_extmul_ high_ u32x4 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i64x2_extmul_ low_ i32x4 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i64x2_extmul_ low_ u32x4 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- i64x2_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
- i64x2_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
- i64x2_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
- i64x2_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
- i64x2_load_ ⚠extend_ i32x2 target_family="wasm"andsimd128Load two 32-bit integers and sign extend each one to a 64-bit lane
- i64x2_load_ ⚠extend_ u32x2 target_family="wasm"andsimd128Load two 32-bit integers and zero extend each one to a 64-bit lane
- i64x2_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
- i64x2_mul target_family="wasm"andsimd128Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
- i64x2_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
- i64x2_neg target_family="wasm"andsimd128Negates a 128-bit vectors interpreted as two 64-bit signed integers
- i64x2_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- i64x2_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
- i64x2_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- i64x2_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, sign extending.
- i64x2_shuffle target_family="wasm"andsimd128Same asi8x16_shuffle, except operates as if the inputs were two 64-bit integers, only taking 2 indices to shuffle.
- i64x2_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- i64x2_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
- memory_grow target_family="wasm"Corresponding intrinsic to wasm’smemory.growinstruction
- memory_size target_family="wasm"Corresponding intrinsic to wasm’smemory.sizeinstruction
- u8x16target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- u8x16_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
- u8x16_add_ sat target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow tou8::MAX.
- u8x16_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- u8x16_avgr target_family="wasm"andsimd128Lane-wise rounding average.
- u8x16_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- u8x16_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
- u8x16_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
- u8x16_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
- u8x16_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
- u8x16_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
- u8x16_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
- u8x16_max target_family="wasm"andsimd128Compares lane-wise unsigned integers, and returns the maximum of each pair.
- u8x16_min target_family="wasm"andsimd128Compares lane-wise unsigned integers, and returns the minimum of each pair.
- u8x16_narrow_ i16x8 target_family="wasm"andsimd128Converts two input vectors into a smaller lane vector by narrowing each lane.
- u8x16_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
- u8x16_popcnt target_family="wasm"andsimd128Count the number of bits set to one within each lane.
- u8x16_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- u8x16_relaxed_ swizzle target_family="wasm"andrelaxed-simdA relaxed version ofi8x16_swizzle(a, s)which selects lanes fromausing indices ins.
- u8x16_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
- u8x16_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- u8x16_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
- u8x16_shuffle target_family="wasm"andsimd128Returns a new vector with lanes selected from the lanes of the two input vectors$aand$bspecified in the 16 immediate operands.
- u8x16_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- u8x16_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
- u8x16_sub_ sat target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to 0.
- u8x16_swizzle target_family="wasm"andsimd128Returns a new vector with lanes selected from the lanes of the first input vectoraspecified in the second input vectors.
- u16x8target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- u16x8_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
- u16x8_add_ sat target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow tou16::MAX.
- u16x8_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- u16x8_avgr target_family="wasm"andsimd128Lane-wise rounding average.
- u16x8_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- u16x8_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
- u16x8_extadd_ pairwise_ u8x16 target_family="wasm"andsimd128Integer extended pairwise addition producing extended results (twice wider results than the inputs).
- u16x8_extend_ high_ u8x16 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
- u16x8_extend_ low_ u8x16 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
- u16x8_extmul_ high_ u8x16 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- u16x8_extmul_ low_ u8x16 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- u16x8_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
- u16x8_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
- u16x8_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
- u16x8_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
- u16x8_load_ ⚠extend_ u8x8 target_family="wasm"andsimd128Load eight 8-bit integers and zero extend each one to a 16-bit lane
- u16x8_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
- u16x8_max target_family="wasm"andsimd128Compares lane-wise unsigned integers, and returns the maximum of each pair.
- u16x8_min target_family="wasm"andsimd128Compares lane-wise unsigned integers, and returns the minimum of each pair.
- u16x8_mul target_family="wasm"andsimd128Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
- u16x8_narrow_ i32x4 target_family="wasm"andsimd128Converts two input vectors into a smaller lane vector by narrowing each lane.
- u16x8_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
- u16x8_relaxed_ dot_ i8x16_ i7x16 target_family="wasm"andrelaxed-simdA relaxed dot-product instruction.
- u16x8_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- u16x8_relaxed_ q15mulr target_family="wasm"andrelaxed-simdA relaxed version ofi16x8_relaxed_q15mulrwhere if both lanes arei16::MINthen the result is eitheri16::MINori16::MAX.
- u16x8_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
- u16x8_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- u16x8_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
- u16x8_shuffle target_family="wasm"andsimd128Same asi8x16_shuffle, except operates as if the inputs were eight 16-bit integers, only taking 8 indices to shuffle.
- u16x8_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- u16x8_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
- u16x8_sub_ sat target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to 0.
- u32x4target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- u32x4_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed four 32-bit integers.
- u32x4_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- u32x4_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- u32x4_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
- u32x4_extadd_ pairwise_ u16x8 target_family="wasm"andsimd128Integer extended pairwise addition producing extended results (twice wider results than the inputs).
- u32x4_extend_ high_ u16x8 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
- u32x4_extend_ low_ u16x8 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
- u32x4_extmul_ high_ u16x8 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- u32x4_extmul_ low_ u16x8 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- u32x4_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
- u32x4_ge target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
- u32x4_gt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
- u32x4_le target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
- u32x4_load_ ⚠extend_ u16x4 target_family="wasm"andsimd128Load four 16-bit integers and zero extend each one to a 32-bit lane
- u32x4_lt target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
- u32x4_max target_family="wasm"andsimd128Compares lane-wise unsigned integers, and returns the maximum of each pair.
- u32x4_min target_family="wasm"andsimd128Compares lane-wise unsigned integers, and returns the minimum of each pair.
- u32x4_mul target_family="wasm"andsimd128Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
- u32x4_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
- u32x4_relaxed_ dot_ i8x16_ i7x16_ add target_family="wasm"andrelaxed-simdSimilar toi16x8_relaxed_dot_i8x16_i7x16except that the intermediatei16x8result is fed intoi32x4_extadd_pairwise_i16x8followed byi32x4_addto add the valuecto the result.
- u32x4_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- u32x4_relaxed_ trunc_ f32x4 target_family="wasm"andrelaxed-simdA relaxed version ofu32x4_trunc_sat_f32x4(a)converts thef32lanes ofato unsigned 32-bit integers.
- u32x4_relaxed_ trunc_ f64x2_ zero target_family="wasm"andrelaxed-simdA relaxed version ofu32x4_trunc_sat_f64x2_zero(a)converts thef64lanes ofato unsigned 32-bit integers and the upper two lanes are zero.
- u32x4_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
- u32x4_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- u32x4_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
- u32x4_shuffle target_family="wasm"andsimd128Same asi8x16_shuffle, except operates as if the inputs were four 32-bit integers, only taking 4 indices to shuffle.
- u32x4_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- u32x4_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
- u32x4_trunc_ sat_ f32x4 target_family="wasm"andsimd128Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit unsigned integers.
- u32x4_trunc_ sat_ f64x2_ zero target_family="wasm"andsimd128Saturating conversion of the two double-precision floating point lanes to two lower integer lanes using the IEEEconvertToIntegerTowardZerofunction.
- u64x2target_family="wasm"andsimd128Materializes a SIMD value from the provided operands.
- u64x2_add target_family="wasm"andsimd128Adds two 128-bit vectors as if they were two packed two 64-bit integers.
- u64x2_all_ true target_family="wasm"andsimd128Returns true if all lanes are non-zero, false otherwise.
- u64x2_bitmask target_family="wasm"andsimd128Extracts the high bit for each lane inaand produce a scalar mask with all bits concatenated.
- u64x2_eq target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
- u64x2_extend_ high_ u32x4 target_family="wasm"andsimd128Converts high half of the smaller lane vector to a larger lane vector, zero extended.
- u64x2_extend_ low_ u32x4 target_family="wasm"andsimd128Converts low half of the smaller lane vector to a larger lane vector, zero extended.
- u64x2_extmul_ high_ u32x4 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- u64x2_extmul_ low_ u32x4 target_family="wasm"andsimd128Lane-wise integer extended multiplication producing twice wider result than the inputs.
- u64x2_extract_ lane target_family="wasm"andsimd128Extracts a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
- u64x2_load_ ⚠extend_ u32x2 target_family="wasm"andsimd128Load two 32-bit integers and zero extend each one to a 64-bit lane
- u64x2_mul target_family="wasm"andsimd128Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
- u64x2_ne target_family="wasm"andsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
- u64x2_relaxed_ laneselect target_family="wasm"andrelaxed-simdA relaxed version ofv128_bitselectwhere this either behaves the same asv128_bitselector the high bit of each lanemis inspected and the corresponding lane ofais chosen if the bit is 1 or the lane ofbis chosen if it’s zero.
- u64x2_replace_ lane target_family="wasm"andsimd128Replaces a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
- u64x2_shl target_family="wasm"andsimd128Shifts each lane to the left by the specified number of bits.
- u64x2_shr target_family="wasm"andsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros.
- u64x2_shuffle target_family="wasm"andsimd128Same asi8x16_shuffle, except operates as if the inputs were two 64-bit integers, only taking 2 indices to shuffle.
- u64x2_splat target_family="wasm"andsimd128Creates a vector with identical lanes.
- u64x2_sub target_family="wasm"andsimd128Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
- unreachabletarget_family="wasm"Generates theunreachableinstruction, which causes an unconditional trap.
- v128_and target_family="wasm"andsimd128Performs a bitwise and of the two input 128-bit vectors, returning the resulting vector.
- v128_andnot target_family="wasm"andsimd128Bitwise AND of bits ofaand the logical inverse of bits ofb.
- v128_any_ true target_family="wasm"andsimd128Returnstrueif any bit inais set, orfalseotherwise.
- v128_bitselect target_family="wasm"andsimd128Use the bitmask incto select bits fromv1when 1 andv2when 0.
- v128_load ⚠target_family="wasm"andsimd128Loads av128vector from the given heap address.
- v128_load8_ ⚠lane target_family="wasm"andsimd128Loads an 8-bit value frommand sets laneLofvto that value.
- v128_load8_ ⚠splat target_family="wasm"andsimd128Load a single element and splat to all lanes of a v128 vector.
- v128_load16_ ⚠lane target_family="wasm"andsimd128Loads a 16-bit value frommand sets laneLofvto that value.
- v128_load16_ ⚠splat target_family="wasm"andsimd128Load a single element and splat to all lanes of a v128 vector.
- v128_load32_ ⚠lane target_family="wasm"andsimd128Loads a 32-bit value frommand sets laneLofvto that value.
- v128_load32_ ⚠splat target_family="wasm"andsimd128Load a single element and splat to all lanes of a v128 vector.
- v128_load32_ ⚠zero target_family="wasm"andsimd128Load a 32-bit element into the low bits of the vector and sets all other bits to zero.
- v128_load64_ ⚠lane target_family="wasm"andsimd128Loads a 64-bit value frommand sets laneLofvto that value.
- v128_load64_ ⚠splat target_family="wasm"andsimd128Load a single element and splat to all lanes of a v128 vector.
- v128_load64_ ⚠zero target_family="wasm"andsimd128Load a 64-bit element into the low bits of the vector and sets all other bits to zero.
- v128_not target_family="wasm"andsimd128Flips each bit of the 128-bit input vector.
- v128_ortarget_family="wasm"andsimd128Performs a bitwise or of the two input 128-bit vectors, returning the resulting vector.
- v128_store ⚠target_family="wasm"andsimd128Stores av128vector to the given heap address.
- v128_store8_ ⚠lane target_family="wasm"andsimd128Stores the 8-bit value from laneLofvintom
- v128_store16_ ⚠lane target_family="wasm"andsimd128Stores the 16-bit value from laneLofvintom
- v128_store32_ ⚠lane target_family="wasm"andsimd128Stores the 32-bit value from laneLofvintom
- v128_store64_ ⚠lane target_family="wasm"andsimd128Stores the 64-bit value from laneLofvintom
- v128_xor target_family="wasm"andsimd128Performs a bitwise xor of the two input 128-bit vectors, returning the resulting vector.
- f32_ceil Experimental target_family="wasm"Generates thef32.ceilinstruction, returning the smallest integer greater than or equal toa.
- f32_floor Experimental target_family="wasm"Generates thef32.floorinstruction, returning the largest integer less than or equal toa.
- f32_nearest Experimental target_family="wasm"Generates thef32.nearestinstruction, roundinging to the nearest integer. Rounds half-way cases to the number with an even least significant digit.
- f32_sqrt Experimental target_family="wasm"Generates thef32.sqrtinstruction, returning the square root of the numbera.
- f32_trunc Experimental target_family="wasm"Generates thef32.truncinstruction, roundinging to the nearest integer towards zero.
- f64_ceil Experimental target_family="wasm"Generates thef64.ceilinstruction, returning the smallest integer greater than or equal toa.
- f64_floor Experimental target_family="wasm"Generates thef64.floorinstruction, returning the largest integer less than or equal toa.
- f64_nearest Experimental target_family="wasm"Generates thef64.nearestinstruction, roundinging to the nearest integer. Rounds half-way cases to the number with an even least significant digit.
- f64_sqrt Experimental target_family="wasm"Generates thef64.sqrtinstruction, returning the square root of the numbera.
- f64_trunc Experimental target_family="wasm"Generates thef64.truncinstruction, roundinging to the nearest integer towards zero.
- memory_atomic_ ⚠notify Experimental target_family="wasm"andatomicsCorresponding intrinsic to wasm’smemory.atomic.notifyinstruction
- memory_atomic_ ⚠wait32 Experimental target_family="wasm"andatomicsCorresponding intrinsic to wasm’smemory.atomic.wait32instruction
- memory_atomic_ ⚠wait64 Experimental target_family="wasm"andatomicsCorresponding intrinsic to wasm’smemory.atomic.wait64instruction
- throw⚠Experimental target_family="wasm"Generates thethrowinstruction from the exception-handling proposal for WASM.