Module core::arch::wasm32 1.33.0[−][src]
Platform-specific intrinsics for the wasm32 platform.
This module provides intrinsics specific to the WebAssembly architecture. Here you’ll find intrinsics necessary for leveraging WebAssembly proposals such as atomics and simd. These proposals are evolving over time and as such the support here is unstable and requires the nightly channel. As WebAssembly proposals stabilize these functions will also become stable.
See the module documentation for general information
about the arch module and platform intrinsics.
Atomics
The threads proposal for WebAssembly adds a number of
instructions for dealing with multithreaded programs. Atomic
instructions can all be generated through std::sync::atomic types, but
some instructions have no equivalent in Rust such as
memory.atomic.notify so this module will provide these intrinsics.
At this time, however, these intrinsics are only available when the
standard library itself is compiled with atomics. Compiling with
atomics is not enabled by default and requires passing
-Ctarget-feature=+atomics to rustc. The standard library shipped via
rustup is not compiled with atomics. To get access to these intrinsics
you’ll need to compile the standard library from source with the
requisite compiler flags.
SIMD
The simd proposal for WebAssembly adds a new v128 type for a
128-bit SIMD register. It also adds a large array of instructions to
operate on the v128 type to perform data processing. The SIMD proposal
has been in progress for quite some time and many instructions have come
and gone. This module attempts to keep up with the proposal, but if you
notice anything awry please feel free to open an
issue.
It’s important to be aware that the current state of development of SIMD in WebAssembly is still somewhat early days. There’s lots of pieces to demo and prototype with, but discussions and support are still in progress. There’s a number of pitfalls and gotchas in various places, which will attempt to be documented here, but there may be others lurking!
Using SIMD is intended to be similar to as you would on x86_64, for
example. You’d write a function such as:
#[cfg(target_arch = "wasm32")] #[target_feature(enable = "simd128")] unsafe fn uses_simd() { use std::arch::wasm32::*; // ... }Run
Unlike x86_64, however, WebAssembly does not currently have dynamic
detection at runtime as to whether SIMD is supported (this is one of the
motivators for the conditional sections proposal, but
that is still pretty early days). This means that your binary will
either have SIMD and can only run on engines which support SIMD, or it
will not have SIMD at all. For compatibility the standard library itself
does not use any SIMD internally. Determining how best to ship your
WebAssembly binary with SIMD is largely left up to you as it can can be
pretty nuanced depending on your situation.
To enable SIMD support at compile time you need to do one of two things:
-
First you can annotate functions with
#[target_feature(enable = "simd128")]. This causes just that one function to have SIMD support available to it, and intrinsics will get inlined as usual in this situation. -
Second you can compile your program with
-Ctarget-feature=+simd128. This compilation flag blanket enables SIMD support for your entire compilation. Note that this does not include the standard library unless you recompile the standard library.
If you enable SIMD via either of these routes then you’ll have a WebAssembly binary that uses SIMD instructions, and you’ll need to ship that accordingly. Also note that if you call SIMD intrinsics but don’t enable SIMD via either of these mechanisms, you’ll still have SIMD generated in your program. This means to generate a binary without SIMD you’ll need to avoid both options above plus calling into any intrinsics in this module.
Note: Due to rust-lang/rust#74320 it’s recommended to compile your entire program with SIMD support (using
RUSTFLAGS) or otherwise functions may not be inlined correctly.
Note: LLVM’s SIMD support is actually split into two features:
simd128andunimplemented-simd128. Rust code can enablesimd128with#[target_feature](and test for it with#[cfg(target_feature = "simd128")], but it cannot enableunimplemented-simd128. The only way to enable this feature is to compile with-Ctarget-feature=+simd128,+unimplemented-simd128. This second feature enables more recent instructions implemented in LLVM which haven’t always had enough time to make their way to runtimes.
Structs
| v128 | Experimental WASM-specific 128-bit wide SIMD vector type. |
Functions
| f32x4_abs⚠ | Experimentalsimd128Calculates the absolute value of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers. |
| f32x4_add⚠ | Experimentalsimd128Adds pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers. |
| f32x4_const⚠ | Experimentalsimd128Materializes a constant SIMD value from the immediate operands. |
| f32x4_convert_i32x4_s⚠ | Experimentalsimd128Converts a 128-bit vector interpreted as four 32-bit signed integers into a 128-bit vector of four 32-bit floating point numbers. |
| f32x4_convert_i32x4_u⚠ | Experimentalsimd128Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a 128-bit vector of four 32-bit floating point numbers. |
| f32x4_div⚠ | Experimentalsimd128Divides pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers. |
| f32x4_eq⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers. |
| f32x4_extract_lane⚠ | Experimentalsimd128Extracts a lane from a 128-bit vector interpreted as 4 packed f32 numbers. |
| f32x4_ge⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers. |
| f32x4_gt⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers. |
| f32x4_le⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers. |
| f32x4_lt⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers. |
| f32x4_max⚠ | Experimentalsimd128Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers. |
| f32x4_min⚠ | Experimentalsimd128Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers. |
| f32x4_mul⚠ | Experimentalsimd128Multiplies pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers. |
| f32x4_ne⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers. |
| f32x4_neg⚠ | Experimentalsimd128Negates each lane of a 128-bit vector interpreted as four 32-bit floating point numbers. |
| f32x4_replace_lane⚠ | Experimentalsimd128Replaces a lane from a 128-bit vector interpreted as 4 packed f32 numbers. |
| f32x4_splat⚠ | Experimentalsimd128Creates a vector with identical lanes. |
| f32x4_sqrt⚠ | Experimentalsimd128Calculates the square root of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers. |
| f32x4_sub⚠ | Experimentalsimd128Subtracts pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers. |
| f64x2_abs⚠ | Experimentalsimd128Calculates the absolute value of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers. |
| f64x2_add⚠ | Experimentalsimd128Adds pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers. |
| f64x2_const⚠ | Experimentalsimd128Materializes a constant SIMD value from the immediate operands. |
| f64x2_div⚠ | Experimentalsimd128Divides pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers. |
| f64x2_eq⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers. |
| f64x2_extract_lane⚠ | Experimentalsimd128Extracts a lane from a 128-bit vector interpreted as 2 packed f64 numbers. |
| f64x2_ge⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers. |
| f64x2_gt⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers. |
| f64x2_le⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers. |
| f64x2_lt⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers. |
| f64x2_max⚠ | Experimentalsimd128Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers. |
| f64x2_min⚠ | Experimentalsimd128Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers. |
| f64x2_mul⚠ | Experimentalsimd128Multiplies pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers. |
| f64x2_ne⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers. |
| f64x2_neg⚠ | Experimentalsimd128Negates each lane of a 128-bit vector interpreted as two 64-bit floating point numbers. |
| f64x2_replace_lane⚠ | Experimentalsimd128Replaces a lane from a 128-bit vector interpreted as 2 packed f64 numbers. |
| f64x2_splat⚠ | Experimentalsimd128Creates a vector with identical lanes. |
| f64x2_sqrt⚠ | Experimentalsimd128Calculates the square root of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers. |
| f64x2_sub⚠ | Experimentalsimd128Subtracts pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers. |
| i8x16_abs⚠ | Experimentalsimd128Lane-wise wrapping absolute value. |
| i8x16_add⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers. |
| i8x16_add_saturate_s⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed
integers, saturating on overflow to |
| i8x16_add_saturate_u⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned
integers, saturating on overflow to |
| i8x16_all_true⚠ | Experimentalsimd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero. |
| i8x16_any_true⚠ | Experimentalsimd128Returns 1 if any lane is nonzero or 0 if all lanes are zero. |
| i8x16_avgr_u⚠ | Experimentalsimd128Lane-wise rounding average. |
| i8x16_const⚠ | Experimentalsimd128Materializes a constant SIMD value from the immediate operands. |
| i8x16_eq⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers. |
| i8x16_extract_lane⚠ | Experimentalsimd128Extracts a lane from a 128-bit vector interpreted as 16 packed i8 numbers. |
| i8x16_ge_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers. |
| i8x16_ge_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers. |
| i8x16_gt_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers. |
| i8x16_gt_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers. |
| i8x16_le_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers. |
| i8x16_le_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers. |
| i8x16_lt_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers. |
| i8x16_lt_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers. |
| i8x16_max_s⚠ | Experimentalsimd128Compares lane-wise signed integers, and returns the maximum of each pair. |
| i8x16_max_u⚠ | Experimentalsimd128Compares lane-wise unsigned integers, and returns the maximum of each pair. |
| i8x16_min_s⚠ | Experimentalsimd128Compares lane-wise signed integers, and returns the minimum of each pair. |
| i8x16_min_u⚠ | Experimentalsimd128Compares lane-wise unsigned integers, and returns the minimum of each pair. |
| i8x16_narrow_i16x8_s⚠ | Experimentalsimd128Converts two input vectors into a smaller lane vector by narrowing each lane. |
| i8x16_narrow_i16x8_u⚠ | Experimentalsimd128Converts two input vectors into a smaller lane vector by narrowing each lane. |
| i8x16_ne⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers. |
| i8x16_neg⚠ | Experimentalsimd128Negates a 128-bit vectors intepreted as sixteen 8-bit signed integers |
| i8x16_replace_lane⚠ | Experimentalsimd128Replaces a lane from a 128-bit vector interpreted as 16 packed i8 numbers. |
| i8x16_shl⚠ | Experimentalsimd128Shifts each lane to the left by the specified number of bits. |
| i8x16_shr_s⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, sign extending. |
| i8x16_shr_u⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros. |
| i8x16_splat⚠ | Experimentalsimd128Creates a vector with identical lanes. |
| i8x16_sub⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers. |
| i8x16_sub_saturate_s⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit
signed integers, saturating on overflow to |
| i8x16_sub_saturate_u⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to 0. |
| i16x8_abs⚠ | Experimentalsimd128Lane-wise wrapping absolute value. |
| i16x8_add⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit integers. |
| i16x8_add_saturate_s⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit signed
integers, saturating on overflow to |
| i16x8_add_saturate_u⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned
integers, saturating on overflow to |
| i16x8_all_true⚠ | Experimentalsimd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero. |
| i16x8_any_true⚠ | Experimentalsimd128Returns 1 if any lane is nonzero or 0 if all lanes are zero. |
| i16x8_avgr_u⚠ | Experimentalsimd128Lane-wise rounding average. |
| i16x8_const⚠ | Experimentalsimd128Materializes a constant SIMD value from the immediate operands. |
| i16x8_eq⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers. |
| i16x8_extract_lane⚠ | Experimentalsimd128Extracts a lane from a 128-bit vector interpreted as 8 packed i16 numbers. |
| i16x8_ge_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers. |
| i16x8_ge_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers. |
| i16x8_gt_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers. |
| i16x8_gt_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers. |
| i16x8_le_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers. |
| i16x8_le_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers. |
| i16x8_load8x8_s⚠ | Experimentalsimd128Load eight 8-bit integers and sign extend each one to a 16-bit lane |
| i16x8_load8x8_u⚠ | Experimentalsimd128Load eight 8-bit integers and zero extend each one to a 16-bit lane |
| i16x8_lt_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers. |
| i16x8_lt_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers. |
| i16x8_max_s⚠ | Experimentalsimd128Compares lane-wise signed integers, and returns the maximum of each pair. |
| i16x8_max_u⚠ | Experimentalsimd128Compares lane-wise unsigned integers, and returns the maximum of each pair. |
| i16x8_min_s⚠ | Experimentalsimd128Compares lane-wise signed integers, and returns the minimum of each pair. |
| i16x8_min_u⚠ | Experimentalsimd128Compares lane-wise unsigned integers, and returns the minimum of each pair. |
| i16x8_mul⚠ | Experimentalsimd128Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers. |
| i16x8_narrow_i32x4_s⚠ | Experimentalsimd128Converts two input vectors into a smaller lane vector by narrowing each lane. |
| i16x8_narrow_i32x4_u⚠ | Experimentalsimd128Converts two input vectors into a smaller lane vector by narrowing each lane. |
| i16x8_ne⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers. |
| i16x8_neg⚠ | Experimentalsimd128Negates a 128-bit vectors intepreted as eight 16-bit signed integers |
| i16x8_replace_lane⚠ | Experimentalsimd128Replaces a lane from a 128-bit vector interpreted as 8 packed i16 numbers. |
| i16x8_shl⚠ | Experimentalsimd128Shifts each lane to the left by the specified number of bits. |
| i16x8_shr_s⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, sign extending. |
| i16x8_shr_u⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros. |
| i16x8_splat⚠ | Experimentalsimd128Creates a vector with identical lanes. |
| i16x8_sub⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers. |
| i16x8_sub_saturate_s⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit
signed integers, saturating on overflow to |
| i16x8_sub_saturate_u⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to 0. |
| i16x8_widen_high_i8x16_s⚠ | Experimental Converts high half of the smaller lane vector to a larger lane vector, sign extended. |
| i16x8_widen_high_i8x16_u⚠ | Experimental Converts high half of the smaller lane vector to a larger lane vector, zero extended. |
| i16x8_widen_low_i8x16_s⚠ | Experimental Converts low half of the smaller lane vector to a larger lane vector, sign extended. |
| i16x8_widen_low_i8x16_u⚠ | Experimental Converts low half of the smaller lane vector to a larger lane vector, zero extended. |
| i32x4_abs⚠ | Experimentalsimd128Lane-wise wrapping absolute value. |
| i32x4_add⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed four 32-bit integers. |
| i32x4_all_true⚠ | Experimentalsimd128Returns 1 if all lanes are nonzero or 0 if any lane is nonzero. |
| i32x4_any_true⚠ | Experimentalsimd128Returns 1 if any lane is nonzero or 0 if all lanes are zero. |
| i32x4_const⚠ | Experimentalsimd128Materializes a constant SIMD value from the immediate operands. |
| i32x4_eq⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers. |
| i32x4_extract_lane⚠ | Experimentalsimd128Extracts a lane from a 128-bit vector interpreted as 4 packed i32 numbers. |
| i32x4_ge_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers. |
| i32x4_ge_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers. |
| i32x4_gt_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers. |
| i32x4_gt_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers. |
| i32x4_le_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers. |
| i32x4_le_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers. |
| i32x4_load16x4_s⚠ | Experimentalsimd128Load four 16-bit integers and sign extend each one to a 32-bit lane |
| i32x4_load16x4_u⚠ | Experimentalsimd128Load four 16-bit integers and zero extend each one to a 32-bit lane |
| i32x4_lt_s⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers. |
| i32x4_lt_u⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers. |
| i32x4_max_s⚠ | Experimentalsimd128Compares lane-wise signed integers, and returns the maximum of each pair. |
| i32x4_max_u⚠ | Experimentalsimd128Compares lane-wise unsigned integers, and returns the maximum of each pair. |
| i32x4_min_s⚠ | Experimentalsimd128Compares lane-wise signed integers, and returns the minimum of each pair. |
| i32x4_min_u⚠ | Experimentalsimd128Compares lane-wise unsigned integers, and returns the minimum of each pair. |
| i32x4_mul⚠ | Experimentalsimd128Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers. |
| i32x4_ne⚠ | Experimentalsimd128Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers. |
| i32x4_neg⚠ | Experimentalsimd128Negates a 128-bit vectors intepreted as four 32-bit signed integers |
| i32x4_replace_lane⚠ | Experimentalsimd128Replaces a lane from a 128-bit vector interpreted as 4 packed i32 numbers. |
| i32x4_shl⚠ | Experimentalsimd128Shifts each lane to the left by the specified number of bits. |
| i32x4_shr_s⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, sign extending. |
| i32x4_shr_u⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros. |
| i32x4_splat⚠ | Experimentalsimd128Creates a vector with identical lanes. |
| i32x4_sub⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed four 32-bit integers. |
| i32x4_trunc_sat_f32x4_s⚠ | Experimentalsimd128Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit signed integers. |
| i32x4_trunc_sat_f32x4_u⚠ | Experimentalsimd128Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit unsigned integers. |
| i32x4_widen_high_i16x8_s⚠ | Experimental Converts high half of the smaller lane vector to a larger lane vector, sign extended. |
| i32x4_widen_high_i16x8_u⚠ | Experimental Converts high half of the smaller lane vector to a larger lane vector, zero extended. |
| i32x4_widen_low_i16x8_s⚠ | Experimental Converts low half of the smaller lane vector to a larger lane vector, sign extended. |
| i32x4_widen_low_i16x8_u⚠ | Experimental Converts low half of the smaller lane vector to a larger lane vector, zero extended. |
| i64x2_add⚠ | Experimentalsimd128Adds two 128-bit vectors as if they were two packed two 64-bit integers. |
| i64x2_const⚠ | Experimentalsimd128Materializes a constant SIMD value from the immediate operands. |
| i64x2_extract_lane⚠ | Experimentalsimd128Extracts a lane from a 128-bit vector interpreted as 2 packed i64 numbers. |
| i64x2_load32x2_s⚠ | Experimentalsimd128Load two 32-bit integers and sign extend each one to a 64-bit lane |
| i64x2_load32x2_u⚠ | Experimentalsimd128Load two 32-bit integers and zero extend each one to a 64-bit lane |
| i64x2_mul⚠ | Experimentalsimd128Multiplies two 128-bit vectors as if they were two packed two 64-bit integers. |
| i64x2_neg⚠ | Experimentalsimd128Negates a 128-bit vectors intepreted as two 64-bit signed integers |
| i64x2_replace_lane⚠ | Experimentalsimd128Replaces a lane from a 128-bit vector interpreted as 2 packed i64 numbers. |
| i64x2_shl⚠ | Experimentalsimd128Shifts each lane to the left by the specified number of bits. |
| i64x2_shr_s⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, sign extending. |
| i64x2_shr_u⚠ | Experimentalsimd128Shifts each lane to the right by the specified number of bits, shifting in zeros. |
| i64x2_splat⚠ | Experimentalsimd128Creates a vector with identical lanes. |
| i64x2_sub⚠ | Experimentalsimd128Subtracts two 128-bit vectors as if they were two packed two 64-bit integers. |
| memory_atomic_notify⚠ | Experimental Corresponding intrinsic to wasm’s |
| memory_atomic_wait32⚠ | Experimental Corresponding intrinsic to wasm’s |
| memory_atomic_wait64⚠ | Experimental Corresponding intrinsic to wasm’s |
| v8x16_load_splat⚠ | Experimentalsimd128Load a single element and splat to all lanes of a v128 vector. |
| v8x16_shuffle⚠ | Experimentalsimd128Returns a new vector with lanes selected from the lanes of the two input
vectors |
| v8x16_swizzle⚠ | Experimentalsimd128Returns a new vector with lanes selected from the lanes of the first input
vector |
| v16x8_load_splat⚠ | Experimentalsimd128Load a single element and splat to all lanes of a v128 vector. |
| v16x8_shuffle⚠ | Experimentalsimd128Same as |
| v32x4_load_splat⚠ | Experimentalsimd128Load a single element and splat to all lanes of a v128 vector. |
| v32x4_shuffle⚠ | Experimentalsimd128Same as |
| v64x2_load_splat⚠ | Experimentalsimd128Load a single element and splat to all lanes of a v128 vector. |
| v64x2_shuffle⚠ | Experimentalsimd128Same as |
| v128_and⚠ | Experimentalsimd128Performs a bitwise and of the two input 128-bit vectors, returning the resulting vector. |
| v128_andnot⚠ | Experimentalsimd128Bitwise AND of bits of |
| v128_bitselect⚠ | Experimentalsimd128Use the bitmask in |
| v128_load⚠ | Experimentalsimd128Loads a |
| v128_not⚠ | Experimentalsimd128Flips each bit of the 128-bit input vector. |
| v128_or⚠ | Experimentalsimd128Performs a bitwise or of the two input 128-bit vectors, returning the resulting vector. |
| v128_store⚠ | Experimentalsimd128Stores a |
| v128_xor⚠ | Experimentalsimd128Performs a bitwise xor of the two input 128-bit vectors, returning the resulting vector. |
| memory_grow | Corresponding intrinsic to wasm’s |
| memory_size | Corresponding intrinsic to wasm’s |
| unreachable⚠ | Generates the trap instruction |