🔬This is a nightly-only experimental API. (
stdsimd #27731)Available on RISC-V RV64 only.
Expand description
Platform-specific intrinsics for the riscv64 platform.
See the module documentation for more details.
Functions
Reads the floating-point control and status register
fcsrReads the floating-point accrued exception flags register
fflagsReads the floating-point rounding mode register
frmSwaps the floating-point control and status register
fcsrSwaps the floating-point accrued exception flags register
fflagsSwaps the floating-point rounding mode register
frmHypervisor memory management fence for guest physical address and virtual machine
Hypervisor memory management fence for all virtual machines and guest physical addresses
Hypervisor memory management fence for guest physical address
Hypervisor memory management fence for given virtual machine
Hypervisor memory management fence for given guest virtual address and guest address space
Hypervisor memory management fence for all guest address spaces and guest virtual addresses
Hypervisor memory management fence for given guest address space
Hypervisor memory management fence for given guest virtual address
Invalidate hypervisor translation cache for guest physical address and virtual machine
Invalidate hypervisor translation cache for all virtual machines and guest physical addresses
Invalidate hypervisor translation cache for guest physical address
Invalidate hypervisor translation cache for given virtual machine
Invalidate hypervisor translation cache for given guest virtual address and guest address space
Invalidate hypervisor translation cache for all guest address spaces and guest virtual addresses
Invalidate hypervisor translation cache for given guest address space
Invalidate hypervisor translation cache for given guest virtual address
Accesses virtual machine instruction by unsigned half integer
Accesses virtual machine instruction by unsigned word integer
Generates the
NOP instructionGenerates the
PAUSE instructionGenerates the
SFENCE.INVAL.IR instructionSupervisor memory management fence for given virtual address and address space
Supervisor memory management fence for all address spaces and virtual addresses
Supervisor memory management fence for given address space
Supervisor memory management fence for given virtual address
Generates the
SFENCE.W.INVAL instructionInvalidate supervisor translation cache for given virtual address and address space
Invalidate supervisor translation cache for all address spaces and virtual addresses
Invalidate supervisor translation cache for given address space
Invalidate supervisor translation cache for given virtual address
P0 transformation function as is used in the SM3 hash algorithmP1 transformation function as is used in the SM3 hash algorithmAccelerates the round function
F in the SM4 block cipher algorithmAccelerates the key schedule operation in the SM4 block cipher algorithm