From: Egbert Eich <eich@suse.de>
Date: Mon May 11 08:38:15 2015 +0200
Subject: Limit supported ASICs to ASICs in systems listed in FATE#317933
Patch-mainline: never

References: FATE#317933, bnc#930085
Signed-off-by: Egbert Eich <eich@suse.com>

Signed-off-by: Egbert Eich <eich@suse.de>
---
 drivers/gpu/drm/i915/i915_drv.c     | 23 ++++++++++++++++++++---
 drivers/gpu/drm/i915/i915_drv.h     |  4 ++++
 drivers/gpu/drm/i915/i915_gem.c     |  7 +++++--
 drivers/gpu/drm/i915/i915_gem_gtt.c | 17 ++++++++++++++---
 4 files changed, 43 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 16dedcf..eff79a1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -155,8 +155,9 @@ MODULE_PARM_DESC(prefault_disable,
 		"Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");
 
 static struct drm_driver driver;
+#ifndef VLV_ONLY
 extern int intel_agp_enabled;
-
+#endif
 static const struct intel_device_info intel_i830_info = {
 	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
 	.has_overlay = 1, .overlay_needs_physical = 1,
@@ -337,7 +338,8 @@ static const struct intel_device_info intel_haswell_m_info = {
  * and subvendor IDs, we need it to come before the more general IVB
  * PCI ID matches, otherwise we'll use the wrong info struct above.
  */
-#define INTEL_PCI_IDS \
+#ifndef VLV_ONLY
+#define INTEL_PCI_IDS				\
 	INTEL_I830_IDS(&intel_i830_info),	\
 	INTEL_I845G_IDS(&intel_845g_info),	\
 	INTEL_I85X_IDS(&intel_i85x_info),	\
@@ -363,6 +365,10 @@ static const struct intel_device_info intel_haswell_m_info = {
 	INTEL_HSW_M_IDS(&intel_haswell_m_info), \
 	INTEL_VLV_M_IDS(&intel_valleyview_m_info),	\
 	INTEL_VLV_D_IDS(&intel_valleyview_d_info)
+#else
+#define INTEL_PCI_IDS \
+	INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info)
+#endif
 
 static const struct pci_device_id pciidlist[] = {		/* aka */
 	INTEL_PCI_IDS,
@@ -811,10 +817,18 @@ static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (intel_info->gen != 3) {
 		driver.driver_features &=
 			~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP);
-	} else if (!intel_agp_enabled) {
+	} else
+#ifndef VLV_ONLY
+		if (!intel_agp_enabled) {
 		DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
 		return -ENODEV;
 	}
+#else
+	{
+		DRM_ERROR("drm/i915 for Valley View only!\n");
+		return -ENODEV;
+	}
+#endif
 
 	return drm_get_pci_dev(pdev, ent, &driver);
 }
@@ -986,6 +1000,9 @@ static int __init i915_init(void)
 	 * Allow optional vga_text_mode_force boot option to override
 	 * the default behavior.
 	 */
+#ifdef VLV_ONLY
+	printk(KERN_INFO "i915 driver - intended for ValleyView only!\n");
+#endif
 #if defined(CONFIG_DRM_I915_KMS)
 	if (i915_modeset != 0)
 		driver.driver_features |= DRIVER_MODESET;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 292b357..b04da4d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -53,6 +53,8 @@
 #define DRIVER_DESC		"Intel Graphics"
 #define DRIVER_DATE		"20080730"
 
+#define VLV_ONLY
+
 enum pipe {
 	INVALID_PIPE = -1,
 	PIPE_A = 0,
@@ -2095,8 +2097,10 @@ void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start,
 int i915_gem_gtt_init(struct drm_device *dev);
 static inline void i915_gem_chipset_flush(struct drm_device *dev)
 {
+#ifndef VLV_ONLY
 	if (INTEL_INFO(dev)->gen < 6)
 		intel_gtt_chipset_flush();
+#endif
 }
 
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 94ae912..4f1512f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4343,10 +4343,13 @@ i915_gem_init_hw(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	int ret;
-
+#ifndef VLV_ONLY
 	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
 		return -EIO;
-
+#else
+	if (INTEL_INFO(dev)->gen < 6)
+		return -EINVAL;
+#endif
 	if (dev_priv->ellc_size)
 		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f4cc684..4c61654 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -523,9 +523,13 @@ void i915_check_and_clear_faults(struct drm_device *dev)
 
 static void i915_ggtt_flush(struct drm_i915_private *dev_priv)
 {
+#ifndef VLV_ONLY
 	if (INTEL_INFO(dev_priv->dev)->gen < 6) {
 		intel_gtt_chipset_flush();
-	} else {
+
+	} else
+#endif
+	  {
 		I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
 		POSTING_READ(GFX_FLSH_CNTL_GEN6);
 	}
@@ -650,7 +654,7 @@ static void gen6_ggtt_clear_range(struct i915_address_space *vm,
 	readl(gtt_base);
 }
 
-
+#ifndef VLV_ONLY
 static void i915_ggtt_insert_entries(struct i915_address_space *vm,
 				     struct sg_table *st,
 				     unsigned int pg_start,
@@ -670,7 +674,7 @@ static void i915_ggtt_clear_range(struct i915_address_space *vm,
 {
 	intel_gtt_clear_range(first_entry, num_entries);
 }
-
+#endif
 
 void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,
 			      enum i915_cache_level cache_level)
@@ -946,6 +950,7 @@ static void gen6_gmch_remove(struct i915_address_space *vm)
 	teardown_scratch_page(vm->dev);
 }
 
+#ifndef VLV_ONLY
 static int i915_gmch_probe(struct drm_device *dev,
 			   size_t *gtt_total,
 			   size_t *stolen,
@@ -974,6 +979,7 @@ static void i915_gmch_remove(struct i915_address_space *vm)
 {
 	intel_gmch_remove();
 }
+#endif
 
 int i915_gem_gtt_init(struct drm_device *dev)
 {
@@ -982,8 +988,13 @@ int i915_gem_gtt_init(struct drm_device *dev)
 	int ret;
 
 	if (INTEL_INFO(dev)->gen <= 5) {
+#ifndef VLV_ONLY
 		gtt->gtt_probe = i915_gmch_probe;
 		gtt->base.cleanup = i915_gmch_remove;
+#else
+		DRM_DEBUG_DRIVER("This driver only support ValleyView\n");
+		return -EINVAL;
+#endif
 	} else {
 		gtt->gtt_probe = gen6_gmch_probe;
 		gtt->base.cleanup = gen6_gmch_remove;
