From: Michael Neuling <mikey@neuling.org>
Subject: powerpc: Cleanup handling of the DSCR bit in the FSCR register
Git-commit: bc683a7e51c5c838bc74316125bebec92af74f12
Patch-mainline: v3.12-rc1
References: bsc#912129, FATE#317619

 powerpc: Cleanup handling of the DSCR bit in the FSCR register

As suggested by paulus we can simplify the Data Stream Control Register
(DSCR) Facility Status and Control Register (FSCR) handling.

Firstly, we simplify the asm by using a rldimi.

Secondly, we now use the FSCR only to control the DSCR facility, rather
than both the FSCR and HFSCR.  Users will see no functional change from
this but will get a minor speedup as they will trap into the kernel only
once (rather than twice) when they first touch the DSCR.  Also, this
changes removes a bunch of ugly FTR_SECTION code.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Backported-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Acked-by: Torsten Duwe <duwe@suse.de>

---
 arch/powerpc/kernel/entry_64.S | 17 ++++-------------
 arch/powerpc/kernel/traps.c    |  2 +-
 2 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 54fc607..8fdda7d 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -576,24 +576,15 @@ BEGIN_FTR_SECTION
 	ld	r7,DSCR_DEFAULT@toc(2)
 	ld	r0,THREAD_DSCR(r4)
 	cmpwi	r6,0
-	li	r8, FSCR_DSCR
 	bne	1f
 	ld	r0,0(r7)
-	b       3f
 1:
 BEGIN_FTR_SECTION_NESTED(70)
-	mfspr   r6, SPRN_FSCR
-	or      r6, r6, r8
-	mtspr   SPRN_FSCR, r6
-	b       4f
+	mfspr   r8, SPRN_FSCR
+	rldimi  r8, r6, FSCR_DSCR_LG, (63 - FSCR_DSCR_LG)
+	mtspr   SPRN_FSCR, r8
 END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
-3:
-BEGIN_FTR_SECTION_NESTED(70)
-	mfspr   r6, SPRN_FSCR
-	andc    r6, r6, r8
-	mtspr   SPRN_FSCR, r6
-END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
-4:	cmpd    r0,r25
+	cmpd    r0,r25
 	beq	2f
 	mtspr	SPRN_DSCR,r0
 2:
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 2f63c33..c84381e 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1148,7 +1148,7 @@ void facility_unavailable_exception(struct pt_regs *regs)
 	if (status == FSCR_DSCR_LG) {
 		/* User is acessing the DSCR.  Set the inherit bit and allow
 		 * the user to set it directly in future by setting via the
-		 * FSCR DSCR bit.
+		 * FSCR DSCR bit. We always leave HFSCR DSCR set.
 		 */
 		current->thread.dscr_inherit = 1;
 		mtspr(SPRN_FSCR,  value | FSCR_DSCR);
-- 
1.9.3

