References: bsc#1231046

# Commit 813da5f0e73b8cbd2ac3c7922506e58c28cd736d
# Date 2023-07-17 10:31:10 +0200
# Author Roger Pau Monné <roger.pau@citrix.com>
# Committer Jan Beulich <jbeulich@suse.com>
x86/ioapic: sanitize IO-APIC pins before enabling lapic LVTERR/ESR

The current logic to init the local APIC and the IO-APIC does init the
local APIC LVTERR/ESR before doing any sanitization on the IO-APIC pin
configuration.  It's already noted on enable_IO_APIC() that Xen
shouldn't trust the IO-APIC being empty at bootup.

At XenServer we have a system where the IO-APIC 0 is handed to Xen
with pin 0 unmasked, set to Fixed delivery mode, edge triggered and
with a vector of 0 (all fields of the RTE are zeroed).  Once the local
APIC LVTERR/ESR is enabled periodic injections from such pin cause the
local APIC to in turn inject periodic error vectors:

APIC error on CPU0: 00(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector

That prevents Xen from booting.

Move the masking of the IO-APIC pins ahead of the setup of the local
APIC.  This has the side effect of also moving the detection of the
pin where the i8259 is connected, as such detection must be done
before masking any pins.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>

--- sle12sp5.orig/xen/arch/x86/apic.c	2024-10-09 14:23:19.175843591 +0200
+++ sle12sp5/xen/arch/x86/apic.c	2024-10-09 14:23:31.843843543 +0200
@@ -1497,6 +1497,10 @@ int __init APIC_init_uniprocessor (void)
     physids_clear(phys_cpu_present_map);
     physid_set(boot_cpu_physical_apicid, phys_cpu_present_map);
 
+    if ( !skip_ioapic_setup && nr_ioapics )
+        /* Sanitize the IO-APIC pins before enabling the lapic LVTERR/ESR. */
+        enable_IO_APIC();
+
     setup_local_APIC();
 
     if (nmi_watchdog == NMI_LOCAL_APIC)
--- sle12sp5.orig/xen/include/asm-x86/irq.h	2024-10-09 14:23:19.175843591 +0200
+++ sle12sp5/xen/include/asm-x86/irq.h	2024-10-09 14:23:31.843843543 +0200
@@ -112,6 +112,7 @@ bool bogus_8259A_irq(unsigned int irq);
 int i8259A_suspend(void);
 int i8259A_resume(void);
 
+void enable_IO_APIC(void);
 void setup_IO_APIC(void);
 void disable_IO_APIC(void);
 void setup_ioapic_dest(void);
--- sle12sp5.orig/xen/arch/x86/io_apic.c	2024-10-09 14:23:19.179843591 +0200
+++ sle12sp5/xen/arch/x86/io_apic.c	2024-10-09 14:23:31.843843543 +0200
@@ -1256,7 +1256,7 @@ static void _print_IO_APIC_keyhandler(un
     __print_IO_APIC(0);
 }
 
-static void __init enable_IO_APIC(void)
+void __init enable_IO_APIC(void)
 {
     int i8259_apic, i8259_pin;
     int i, apic;
@@ -2053,8 +2053,6 @@ static void __init ioapic_pm_state_alloc
 
 void __init setup_IO_APIC(void)
 {
-    enable_IO_APIC();
-
     if (acpi_ioapic)
         io_apic_irqs = ~0;	/* all IRQs go through IOAPIC */
     else
--- sle12sp5.orig/xen/arch/x86/smpboot.c	2024-10-09 14:23:19.179843591 +0200
+++ sle12sp5/xen/arch/x86/smpboot.c	2024-10-09 14:23:31.843843543 +0200
@@ -1172,6 +1172,11 @@ void __init smp_prepare_cpus(void)
     verify_local_APIC();
 
     connect_bsp_APIC();
+
+    if ( !skip_ioapic_setup && nr_ioapics )
+        /* Sanitize the IO-APIC pins before enabling the lapic LVTERR/ESR. */
+        enable_IO_APIC();
+
     setup_local_APIC();
 
     smpboot_setup_io_apic();