From 94ab00aaac973fa8c4e27bbf2529387e713ad8f3 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Fri, 23 Sep 2016 14:23:43 +0100
Subject: [PATCH 18/19] ARM: gic-v3: Work around definition of gic_write_bpr1
Git-commit: 3d9cd95f90b2987ef95182a4340a9150e06c4253
Patch-mainline: v4.9-rc1
References: bsc#1043231

A new accessor for gic_write_bpr1 is added to arch_gicv3.h in 4.9,
whilst the CP15 accessors are redifined in a separate branch.
This leads to a horrible clash, where the new accessor ends up with
a crap "asm volatile" definition.

Work around this by carrying our own definition of gic_write_bpr1,
creating a small conflict which will be obvious to resolve.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 arch/arm/include/asm/arch_gicv3.h |    4 ++++
 1 file changed, 4 insertions(+)

--- a/arch/arm/include/asm/arch_gicv3.h
+++ b/arch/arm/include/asm/arch_gicv3.h
@@ -155,7 +155,11 @@ static inline void gic_write_sre(u32 val
 
 static inline void gic_write_bpr1(u32 val)
 {
+#if defined(__write_sysreg) && defined(ICC_BPR1)
+	write_sysreg(val, ICC_BPR1);
+#else
 	asm volatile("mcr " __stringify(ICC_BPR1) : : "r" (val));
+#endif
 }
 
 /*
