From c36a0176ba678fd1a4bf985fd62f43dd4f4d4a03 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Fri, 18 Mar 2016 14:26:35 +0200
Subject: [PATCH] dmaengine: hsu: don't check direction of timeouted channel
Git-commit: c36a0176ba678fd1a4bf985fd62f43dd4f4d4a03
Patch-mainline: 4.7-rc1
References: bsc#1024449

The timeout capability is only available on the so called DMA write channels,
i.e. associated with UART Rx FIFO. It means we don't need to check the
direction of the channel to handle timeouts.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 drivers/dma/hsu/hsu.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/dma/hsu/hsu.c
+++ b/drivers/dma/hsu/hsu.c
@@ -160,7 +160,7 @@ irqreturn_t hsu_dma_irq(struct hsu_dma_c
 		return IRQ_NONE;
 
 	/* Timeout IRQ, need wait some time, see Errata 2 */
-	if (hsuc->direction == DMA_DEV_TO_MEM && (sr & HSU_CH_SR_DESCTO_ANY))
+	if (sr & HSU_CH_SR_DESCTO_ANY)
 		udelay(2);
 
 	sr &= ~HSU_CH_SR_DESCTO_ANY;
