/*
 * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the Software),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#ifndef __lr10_dev_nvlctrl_ip_h__
#define __lr10_dev_nvlctrl_ip_h__
/* This file is autogenerated.  Do not edit */
#define NV_NVLCTRL_LINK_INTR_0_STATUS(i)                      (0x00000304+(i)*0x40) /* R--4A */
#define NV_NVLCTRL_LINK_INTR_0_STATUS__SIZE_1                 4               /*       */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_FATAL                   0:0             /* R-EVF */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_FATAL_INIT              0x00000000      /* R-E-V */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_NONFATAL                1:1             /* R-EVF */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_NONFATAL_INIT           0x00000000      /* R-E-V */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_CORRECTABLE             2:2             /* R-EVF */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_CORRECTABLE_INIT        0x00000000      /* R-E-V */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_INTR0                   3:3             /* R-EVF */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_INTR0_INIT              0x00000000      /* R-E-V */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_INTR1                   4:4             /* R-EVF */
#define NV_NVLCTRL_LINK_INTR_0_STATUS_INTR1_INIT              0x00000000      /* R-E-V */
#define NV_NVLCTRL_PLL_PRI_CLOCK_GATING                       0x00000604      /* RW-4R */
#define NV_NVLCTRL_PLL_PRI_CLOCK_GATING_CG1_SLCG              0:0             /* RWEVF */
#define NV_NVLCTRL_PLL_PRI_CLOCK_GATING_CG1_SLCG_ENABLED      0x00000000      /* RW--V */
#define NV_NVLCTRL_PLL_PRI_CLOCK_GATING_CG1_SLCG_DISABLED     0x00000001      /* RWE-V */
#define NV_NVLCTRL_PLL_PRI_CLOCK_GATING_CG1_SLCG__PROD        0x00000000      /* RW--V */
#define NV_NVLCTRL_COMMON_INTR_0_MASK                         0x00000220      /* RW-4R */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_FATAL                   0:0             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_FATAL_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_NONFATAL                1:1             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_NONFATAL_INIT           0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_CORRECTABLE             2:2             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_CORRECTABLE_INIT        0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_INTR0                   3:3             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_INTR0_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_INTR1                   4:4             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_0_MASK_INTR1_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_1_MASK                         0x00000228      /* RW-4R */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_FATAL                   0:0             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_FATAL_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_NONFATAL                1:1             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_NONFATAL_INIT           0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_CORRECTABLE             2:2             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_CORRECTABLE_INIT        0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_INTR0                   3:3             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_INTR0_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_INTR1                   4:4             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_1_MASK_INTR1_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_2_MASK                         0x00000230      /* RW-4R */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_FATAL                   0:0             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_FATAL_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_NONFATAL                1:1             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_NONFATAL_INIT           0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_CORRECTABLE             2:2             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_CORRECTABLE_INIT        0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_INTR0                   3:3             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_INTR0_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_INTR1                   4:4             /* RWIVF */
#define NV_NVLCTRL_COMMON_INTR_2_MASK_INTR1_INIT              0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_0_MASK(i)                        (0x00000300+(i)*0x40) /* RW-4A */
#define NV_NVLCTRL_LINK_INTR_0_MASK__SIZE_1                   4               /*       */
#define NV_NVLCTRL_LINK_INTR_0_MASK_FATAL                     0:0             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_0_MASK_FATAL_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_0_MASK_NONFATAL                  1:1             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_0_MASK_NONFATAL_INIT             0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_0_MASK_CORRECTABLE               2:2             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_0_MASK_CORRECTABLE_INIT          0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_0_MASK_INTR0                     3:3             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_0_MASK_INTR0_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_0_MASK_INTR1                     4:4             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_0_MASK_INTR1_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_1_MASK(i)                        (0x00000308+(i)*0x40) /* RW-4A */
#define NV_NVLCTRL_LINK_INTR_1_MASK__SIZE_1                   4               /*       */
#define NV_NVLCTRL_LINK_INTR_1_MASK_FATAL                     0:0             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_1_MASK_FATAL_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_1_MASK_NONFATAL                  1:1             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_1_MASK_NONFATAL_INIT             0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_1_MASK_CORRECTABLE               2:2             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_1_MASK_CORRECTABLE_INIT          0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_1_MASK_INTR0                     3:3             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_1_MASK_INTR0_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_1_MASK_INTR1                     4:4             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_1_MASK_INTR1_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_2_MASK(i)                        (0x00000310+(i)*0x40) /* RW-4A */
#define NV_NVLCTRL_LINK_INTR_2_MASK__SIZE_1                   4               /*       */
#define NV_NVLCTRL_LINK_INTR_2_MASK_FATAL                     0:0             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_2_MASK_FATAL_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_2_MASK_NONFATAL                  1:1             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_2_MASK_NONFATAL_INIT             0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_2_MASK_CORRECTABLE               2:2             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_2_MASK_CORRECTABLE_INIT          0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_2_MASK_INTR0                     3:3             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_2_MASK_INTR0_INIT                0x00000000      /* RWI-V */
#define NV_NVLCTRL_LINK_INTR_2_MASK_INTR1                     4:4             /* RWIVF */
#define NV_NVLCTRL_LINK_INTR_2_MASK_INTR1_INIT                0x00000000      /* RWI-V */
#endif // __lr10_dev_nvlctrl_ip_h__
